Output calibrators are used to calibrate signaling levels in high-speed signaling systems. Through calibration, signal level variations resulting from changes in process, voltage and temperature can be reduced, increasing signaling margins and enabling higher signaling rates.
FIG. 1 illustrates a prior art signaling system 100 having a variable-strength output driver 101 and an output calibrator 103. The output calibrator 103 includes a compare circuit 105 to compare a data signal (DATA) generated by the output driver 101 with a reference signal, VREF, and a counter 107 that is incremented or decremented according to the comparison result. The count value maintained within the counter (CNT) is output to the output driver 101 to control the voltage level of the data signal. Thus, the output calibrator 103 constitutes a feedback circuit that increases or decreases the data signal level as necessary to reduce the difference between the data signal level and the reference signal level.
FIG. 2 illustrates a sequence of calibration operations used to adjust the count value, and therefore the data signal level, in the system of FIG. 1. Initially, the count value is set to a midpoint value 2N−1 to divide the search range for the target signal level (TSL) in half. In the example shown, the target signal level corresponds to a count value that is above the initial count value so that each initial calibration operation results in a stepwise increment of the count value until, X calibration operations later, a count value of 2N−1+X is reached. At this count value, the data signal level exceeds the target signal level, so that the count value is decremented in the next calibration operation, and the calibration operations thereafter produce in a stepwise dithering about the target signal level.
As signal amplitudes and bit times shrink to achieve the ever-higher signaling rates demanded by modern computing and electronics applications, the level of precision needed in signal calibration operations increases. Referring to FIG. 2, it can be seen that the precision of the signal calibration is limited by the quantization error inherent in a stepwise increment of the count value, the worst case quantization error (QE) being equal to the signal level increment resulting from a single step of the count value. Accordingly, one direct way to increase calibration precision is to increase the resolution of the count value and the incremental drive strength adjustment in the output driver, thereby reducing the worst case quantization error within the output calibrator. Unfortunately, each additional bit of resolution within the count value doubles the size of the search range for the target signal level and therefore substantially increases the time required to achieve convergence (i.e., to reach the dither condition). This is particularly problematic in modern computing systems, where timing budgets for initialization operations are being squeezed to reduce boot times. Also, because each stepwise calibration operation is typically performed in response to one or more calibration commands from a programmed control device, increasing the calibration precision typically involves modifying system programming to increase the number of initial calibration commands. Such modifications make legacy support for lower-precision devices difficult, limiting device interchangeability and complicating hybrid systems that include both higher- and lower-precision devices.